Blogspot - asic-soc.blogspot.com - ASIC-System on Chip-VLSI Design
General Information:
Latest News:
Setup and hold slack 24 Aug 2013 | 11:44 am
13. Setup and hold slack Slack Slack is defined as difference between actual or achieved time and the desired time for a timing path. For timing path slack determines if the design is working at ...
Setup and hold time definition 4 Aug 2013 | 12:49 pm
1. Setup and hold time definition Setup and hold checks are the most common types of timing checks used in timing verification. Synchronous inputs (e.g. D) have Setup, Hold time specification wi...
Fundamentals of Timing 4 Aug 2013 | 12:02 pm
1. Fundamentals of Timing 11.1. Timing paths Any digital circuit can be represented as a “timing path” modeled between two flip flops. Read complete article >>
Design Objects 25 Jul 2013 | 09:31 pm
1. Design Objects Design objects which are regularly used w.r.to design are design is explained below. Read complete article >>
Wire load models for synthesis 24 Jul 2013 | 08:11 pm
9.1. Wire load models for synthesis Wire load modeling allows us to estimate the effect of wire length and fanout on the resistance, capacitance, and area of nets. Synthesizer uses these physical val...
Wire load models 24 Jul 2013 | 08:03 pm
1. Wire load models Extraction data from already routed designs are used to build a lookup table known as the wire load model (WLM). WLM is based on the statistical estimates of R and C based on “...
Operating Condition: Operating Temperature Variation 22 Jul 2013 | 07:51 pm
8.3. Operating Temperature Variation Temperature variation is unavoidable in the everyday operation of a design. Effects on performance caused by temperature fluctuations are most often handled as li...
Operating Condition: Supply Voltage Variation 22 Jul 2013 | 07:47 pm
8.2. Supply Voltage Variation The design’s supply voltage can vary from the established ideal value during day-to-day operation. Often a complex calculation (using a shift in threshold voltages) is e...
Operating Condition: Process Variation 22 Jul 2013 | 07:45 pm
8.1. Process Variation This variation accounts for deviations in the semiconductor fabrication process. Usually process variation is treated as a percentage variation in the performance calculation. ...
.lib: Cell description 19 Jul 2013 | 11:41 am
7.2.4. Cell description A cell description in the logic library contains variety of attributes describibing the function, timing, power and any other related information of the cell. Eg.: cell (A.....
