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Quartus II 9.1 and NIOS II 9.1 on Windows 7 15 Apr 2010 | 06:48 am
I am sharing my personal experience here. I have been using Quartus II 9.1 and NIOS II IDE 9.1 on Windows 7 since they were released. Now, I am using Quartus II 9.1 SP2 and NIOS II IDE 9.1 SP2. A lot...
When your Altera USB-Blaster is not working ... 4 Oct 2008 | 09:46 am
When your USB-Blaster is not working and you have verified that it is neither USB Driver issue nor PCs issue nor USB cables issue, there is no need to feel disappointed, frustrated and throw away the ...
Thick Film Resistor vs Thin Film Resistor 7 Sep 2007 | 10:21 am
If you are a system designer, you probably always find that there are two kinds of chip resistor, which are thick film resistor and thin film resistor. The question is, what is the difference between ...
Cyclone series continues ... 1 Apr 2007 | 04:03 am
Finally, Altera launched Cyclone III, after a couple of months lauching Stratix III. Of course, success stories should be continued... That's why we still see Cyclone III and Stratix III today. To be...
Can PLL self-locked without "External" input? 14 Oct 2006 | 11:50 pm
I was busy working on something and suddenly a crazy idea came up. Can a PLL lock itself if I connect a PLL output clock to the PLL input clock on a PCB and both the PLL multiplication and division v...
Lattice Now Blogs! 3 Sep 2006 | 02:32 pm
Insteresting! Lattice now blogs! A lots of non-confidential-but-technical information out there! It is always nice to see a FPGA vendor takes initiative to provide a platform for their knowledgable en...
Embed Tclet in Your HTML 2 Aug 2006 | 04:18 am
Since started this blog, I found out that I need to study a minimum amount of HTML to display my writing correctly. Besides, I can have more control writing in "HTML mode" compared with "Compose mode"...
Save More Power In Handheld Devices 14 Jul 2006 | 04:26 am
How to save more power when your CPLD device is in idle mode? Use a very slow clock to reduce toggle rate? Partially disabling the logic inside the device? Well, why not powering off the device? I cam...
OP-AMP Configurations Recall 3 Jul 2006 | 03:58 am
It has been a while since I last dealed with op-amp. So, it is good to recall some of the most fundamental op-amp configurations, especially when I am dealing with them recently. In my opinion, op-amp...
Embedded Logic Analyzer inside FPGA 4 Jun 2006 | 09:57 pm
There is no reason to doubt that most of the FPGA users like you and me have gone through some painful experiences wanting to know what is happening inside an FPGA. It is even more painful when you st...
