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verification IP support lists 21 Aug 2013 | 08:17 pm
http://syswip.com/ support env : systemverilog IP lists AMBA CAN IO(I2C) ... http://www.smart-dv.com/products.html support env : IP lists AMBA IO(I2C) http://www.truechip.net/ support env...
python + systemverilog/verilog + uvm IDE (vim) 21 Aug 2013 | 07:01 pm
%vim command line to source the uvm syntax : source ~/.vim/syntax/verilog_systemverilog.vim project: https://github.com/funningboy/vim ref: http://blog.eddie.com.tw/ https://github.com/kaochenlo...
machine learning note1 19 Aug 2013 | 07:16 pm
supervised learning requirement it must have the target/answer in it's training phase using training phase to build up the using test phase to predict the next value regression find the next v.....
UVM model notes 3 14 Aug 2013 | 02:15 pm
using callback func to handle the trx that's much more beautiful than using the trx handler in the same block this.trans_executed(tr); `uvm_do_callbacks(apb_master,apb_master_cbs,trans_executed(thi.....
python 大補帖 = Anaconda 23 Jul 2013 | 03:45 pm
最近小弟因為要做些圖形應用的 project, 裡面要用到 opencv 跟 big data 相關的 modules, 去幫我做些圖形運算. 但小弟不才, 軟體灌了很久就是裝不起來, 不是東缺一塊就是西塊, 於是就拿出 python 大補帖, 直接install下去, 完全就是快速阿... what's Anaconda a tool set for big data analysis wh...
Demo for interview 14 Jul 2013 | 03:18 pm
最近為了 interview 寫了幾個小 project. 有興趣的就參考看看吧！！
jenkins + python = regression env 14 Jul 2013 | 08:43 am
Hi all, this is a python unittest regression flow by jenkins that can help designer daily run testsuites and support the GUI output reports(coverage pass rate) github: https://github.com/funningboy...
xilinx axi bus traffic gen 3 Jul 2013 | 07:05 pm
AXI4/AXI-stream dependent/independent transaction initial ram error interrupt/ status command data debug address gen align byte 64bit, 32bit... un-align offset type inc, wrap, fixed data...
Xilinx Hierarchical_Design_Methodology 3 Jul 2013 | 12:01 pm
bottom up in any conditions should been re-runed partition again VHDL/ngc/ngd source changed constrains changed partition changed fpga package changed partition(split to small partitions) cost,...
UVM AXI BFM 1.0 release 27 Jun 2013 | 06:35 pm
supported list AXI3/AXI4 bus protocol out of order/ inorder transactions each write/read phase is independent addr/write/resp is independent interlevel split performance watch dog protocol wa....
